View MAX1601611_7589768.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max16016/max16020/max16021 supervisory cir- cuits monitor power supplies, provide battery-backup control, and chip-enable (ce) gating to write protect memory in microprocessor (?)-based systems. these low-power devices improve system reliability by providing several supervisory functions in a small, single integrated solution. the max16016/max16020/max16021 perform four basic system functions: 1) provide a ? reset output during v cc supply power- up, power-down, and brownout conditions. 2) control v cc to battery-backup switching internally to maintain data or low-power operation for memo- ries, real-time clocks (rtcs), and other digital logic when the main power is removed. 3) provide memory write protection through internal chip-enable gating during brownout. 4) provide a combination of additional supervisory functions listed in the features section. the max16016/max16020/max16021 operate from a 1.53v to 5.5v supply voltage and offer fixed reset thresholds for monitoring 5v, 3.3v, 3v, 2.5v, and 1.8v systems. each device is available with either a push- pull or open-drain reset output. the max16016/max16020/max16021 are available in small tdfn/tqfn packages and are fully specified for an operating temperature range of -40? to +85?. applications main/backup power for rtcs, cmos memories industrial control gps systems set-top boxes point-of-sale equipment portable/battery equipment features system monitoring for 5v, 3.3v, 3v, 2.5v, or 1.8v power-supply voltages 1.53v to 5.5v operating voltage range low 1.2 a supply current (0.25 a in battery- backup mode) 145ms (min) reset timeout period battery freshness seal on-board gating of ce signals, 1.5ns propagation delay (max16020/max16021) debounced manual reset input watchdog timer, 1.2s (typ) timeout power-fail comparator and low-line indicator for monitoring voltages down to 0.6v battery-on, battery-ok, and battery test indicators small 10-pin tdfn or 16-pin tqfn packages ul ? -certified to conform to iec 60950-1 max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ________________________________________________________________ maxim integrated products 1 top view max16020 16 v cc cein ceout out ll batt_test battok batton 5 15 6 tqfn 14 7 13 8 ep 12 1 + 11 2 10 3 9 4 batt mr pfi wdi reset gnd pfo wdo pin configurations 19-4145; rev 5; 4/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information continued at end of data sheet. pin configurations continued at end of data sheet. selector guide located at end of data sheet. ordering information part temp range pin-package max16016 _tb_+t -40? to +85? 10 tdfn-ep* the first placeholder ??designates all output options. letter ??indicates push-pull outputs and letter ??indicates open- drain outputs. the last placeholder ??designates the reset threshold (see table 1). t = tape and reel. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. ul is a registered trademark of underwriters laboratories, inc.
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = 1.53v to 5.5v, v batt = 3v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc , batt, out, batt_test to gnd.....................-0.3v to +6v reset , reset, pfo , battok, wdo , batton, batt_test, ll , (all open-drain) to gnd .................-0.3v to +6v reset , reset, battok, wdo , batton, ll (all push-pull) to gnd......................-0.3v to (v out + 0.3v) wdi, pfi to gnd.......................................-0.3v to (v out + 0.3v) ce in, ce out to gnd ..............................-0.3v to (v out + 0.3v) mr to gnd .................................................-0.3v to (v cc + 0.3v) input current v cc peak current.................................................................1a v cc continuous current ...............................................250ma batt peak current .......................................................500ma batt continuous current ...............................................70ma output current out short circuit to gnd duration ....................................10s reset , reset, batton ....................................................20ma continuous power dissipation (t a = +70?) 10-pin tdfn (derate 24.4mw/? above +70?) .......1951mw 16-pin tqfn (derate 25mw/? above +70?) ..........2000mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) tdfn ............................................................................+260? tqfn............................................................................+240? package thermal characteristics (note 1) tdfn junction-to ambient thermal resistance ( ja ) ...........41?/w junction-to case thermal resistance ( jc ) ..................9?/w tqfn junction-to ambient thermal resistance ( ja ) ...........40?/w junction-to case thermal resistance ( jc ) ..................6?/w parameter symbol conditions min typ max units operating voltage range (note 3) v cc , v batt v cc or v batt > v th 0 5.5 v v cc = 1.62v 1.2 2 v cc = 2.8v 1.9 3 v cc = 3.6v 2.3 3.5 supply current i cc v cc > v th v cc = 5.5v 3.4 5 ? supply current in battery-backup mode i batt v cc = 0v 0.25 0.5 ? v cc switchover threshold voltage v cc rising, v cc - v batt 0.1 x v cc v batt switchover threshold voltage v cc falling, v cc < v th , v cc - v batt 0mv batt standby current v cc > v batt + 0.2v -10 +10 na batt freshness leakage current v batt = 5.5v 20 na v cc = 4.75v, i out = 150ma 1.4 4.5 v cc = 3.15v, i out = 65ma 1.7 4.5 v cc = 2.35v, i out = 25ma 2.1 5.0 v cc to out on-resistance r on v cc = 1.91v, i out = 10ma 2.6 5.5 ? v batt = 4.5v, i out = 20ma v batt - 0.1 output voltage in battery-backup mode v out v batt = 2.5v, i out = 20ma v batt - 0.15 v note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = 1.53v to 5.5v, v batt = 3v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units reset output (reset, reset ) reset threshold v th (see table 1) v v cc falling to reset delay t rd v cc falling at 10v/ms 20 ? reset timeout period t rp 145 215 285 ms v cc 3.3v, i sink = 3.2ma, reset asserted 0.3 v cc 1.6v, i sink = 1ma, reset asserted 0.3 reset output low voltage v ol v cc 1.2v, i sink = 100?, reset asserted 0.3 v reset output high voltage (push-pull output) v oh v cc = 1.1 x v th , i source = 100?, reset deasserted v out - 0.3 v reset output leakage current (open-drain output) v reset = 5.5v, reset deasserted 1 a v cc 3.3v, i sink = 3.2ma, reset deasserted 0.3 reset output low voltage v ol v cc 1.8v, i sink = 1.0ma, reset deasserted 0.3 v reset output high voltage (push-pull output) v oh v cc = 0.9 x v th , i source = 100?, reset asserted v out - 0.3 v reset output leakage current (open-drain output) v reset = 5.5v, reset asserted 1 a power-fail comparator pfi, input threshold v pft v in falling, 1.6v v cc 5.5v 0.572 0.590 0.611 v pfi, hysteresis v pft-hys 30 mv pfi input current v cc = 5.5v -1 +1 ? v cc 1.6v, i sink = 1ma, output asserted 0.3 pfo output low voltage v ol v cc 1.2v, i sink = 100?, output asserted 0.3 v pfo output voltage high (push-pull output) v oh v cc = 1.1 x v th , i source = 100?, output asserted v out - 0.3 v pfo , leakage current (open-drain output) v pfo = 5.5v, output deasserted 1 ? pfo , delay time v pft + 100mv to v pft - 100mv 20 ? manual reset ( mr ) input low voltage v il 0.3 x v cc v input high voltage v ih 0.7 x v cc v pullup resistance 20 30 k ? glitch immunity v cc = 3.3v 100 ns mr to reset delay 120 ns
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 4 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = 1.53v to 5.5v, v batt = 3v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units watchdog timer (wdi, wdo ) watchdog timeout period t wd 0.83 1.235 1.64 s minimum wdi input pulse width t wdi 320 ns wdi input low voltage v il (note 6) 0.3 x v cc v wdi input high voltage v ih (note 6) 0.7 x v cc v wdi input current (note 7) v wdi = 0v or 5.5v, time average -1 +1 ? wdo output low voltage v ol v cc = 5.0v, i sink = 1ma, wdo asserted 0.3 v wdo output high voltage (push-pull output) v oh v cc = 1.1 x v th , i source = 100?, wdo deasserted v out - 0.3 v wdo leakage current (open-drain output) v wdo = 5.5v, wdo deasserted 1 a battery-on indicator (batton) output low voltage v ol i sink = 3.2ma, v batt = 2.1v 0.3 v batton leakage current v batton = 5.5v 1 a batton output high voltage v oh v cc = 0.9 x v th , i source = 100?, batton asserted v out - 0.3 v output short-circuit current (note 4) sink current, v cc = 5v 60 ma ce gating ( ce in , ce out) ce in leakage current reset asserted, v cc = 0.9 x v th or 0v -1 +1 ? ce in to ce out resistance reset not asserted (note 5) 8 50 ? ce out short-circuit current reset asserted, ce out = 0, v cc = 0.9 x v th 0.75 2 ma ce in to ce out propagation delay 50 ? source, c load = 50pf, v cc = 4.75v 1.5 7 ns v cc = 5v, v cc v batt , i source = 100? 0.8 x v cc output high voltage v cc = 0v, v batt 2.2v, i source = 1? v batt - 0.1 v reset to ce out delay 12 ?
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating _______________________________________________________________________________________ 5 note 2: all devices are 100% production tested at t a = +25? and t a = +85?. limits to -40? are guaranteed by design. note 3: v batt can be 0v anytime, or v cc can go down to 0v if v batt is active (except at startup). note 4: use external current-limit resistor to limit current to 20ma (max). note 5: ce in/ ce out resistance is tested with v cc = 5v and v ce in = 0v or 5v. note 6: wdi is internally serviced within the watchdog period if wdi is left unconnected. note 7: the wdi input current is specified as the average input current when the wdi input is driven high or low. the wdi input is designed for a three-stated output device with a 10? maximum leakage current and capable of driving a maximum capaci- tive load of 200pf. the three-state device must be able to source and sink at least 200? when active. electrical characteristics (continued) (v cc = 1.53v to 5.5v, v batt = 3v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units low line ( ll ) low line to reset threshold voltage v cc falling (see table 2) mv v cc falling to ll delay v cc falling at 10v/ms 20 ? v cc 1.6v, i sink = 1ma, ll asserted 0.3 ll output low voltage v ol v cc 1.2v, i sink = 100?, ll asserted 0.3 v ll output high voltage (push- pull output) v oh v cc = 0.9 x v th_ ll , i source = 100?, ll deasserted v out - 0.3 v output leakage current v ll = 5.5v, ll deasserted 1 a battery-ok indicator (battok, batt_test) battok threshold inferred internally from batt 2.508 2.6 2.673 v battok output voltage low v ol v cc = 1.1 x v th , i sink = 1ma, reset asserted 0.3 v battok output high voltage v oh v cc = 1.1 x v th , i source = 100?, battok asserted v out - 0.3 v battok output leakage current v battok = 5.5v, deasserted 1 ? batt_test output low voltage v cc = 1.1 x v th , i sink = 1ma 0.3 v table 1a. reset threshold ranges (max16016) reset threshold ranges (v) suffix min typ max l 4.508 4.63 4.906 m 4.264 4.38 4.635 t 2.991 3.08 3.239 s 2.845 2.93 3.080 r 2.549 2.63 2.755 z 2.243 2.32 2.425 y 2.117 2.19 2.288 w 1.603 1.67 1.733 v 1.514 1.575 1.639 table 1b. reset threshold ranges (max16020/max16021) reset threshold ranges (v) suffix min typ max l 4.520 4.684 4.852 m 4.275 4.428 4.585 t 3.010 3.100 3.190 s 2.862 2.946 3.034 r 2.568 2.640 2.716 z 2.260 2.323 2.390 y 2.133 2.192 2.255 w 1.616 1.661 1.710 v 1.528 1.571 1.618
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 6 _______________________________________________________________________________________ v cc supply current vs. supply voltage max16016 toc01 supply voltage (v) i cc ( a) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1 2 3 4 5 0 1.5 5.5 max16020ptez+ v cc supply current vs. temperature (i out = 0ma) max16016 toc02 temperature ( c) i cc ( a) -15 60 35 10 1 2 3 4 5 6 0 -40 85 max16020ptez+ batt supply current vs. supply voltage max16016 toc03 supply voltage (v) i batt ( a) 5.0 3.0 0.5 4.5 1.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 0 5.5 2.0 1.5 4.0 3.5 2.5 max16020ptez+ v batt = 2.5v battery supply current vs. temperature (v cc = 0v) max16016 toc04 temperature ( c) i batt ( a) -15 60 35 10 0.1 0.2 0.3 0.4 0.5 0 -40 85 v batt = 3.0v batt standby current vs. temperature max16016 toc05 temperature ( c) batt standby current (na) -15 60 35 10 -4 0 2 3 5 -5 4 -1 -3 1 -2 -40 85 v cc = 3.2v v batt = 3.0v v cc to out on-resistance vs. supply voltage max16016 toc06 supply voltage (v) v cc to out on-resistance ( ? ) 2.5 2.0 3.0 1.0 0.5 1.5 2.0 2.5 3.0 3.5 4.0 0 1.5 5.5 5.0 3.5 4.5 4.0 max16020ptez+ i out = 25ma i out = 10ma typical operating characteristics (v cc = 5v, v batt = 0v, t a = +25?, unless otherwise noted.) table 2. low-line threshold ranges low-line threshold ranges (v) suffix min typ max l 4.627 4.806 4.955 m 4.378 4.543 4.683 t 3.075 3.181 3.274 s 2.922 3.023 3.111 r 2.620 2.409 2.787 z 2.309 2.383 2.450 y 2.180 2.246 2.311 w 1.653 1.704 1.752 v 1.563 1.612 1.657
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating _______________________________________________________________________________________ 7 normalized reset threshold vs. temperature max16016 toc10 temperature ( c) normalized reset threshold -15 60 35 10 0.996 1.000 1.002 1.003 1.005 0.996 1.004 0.999 0.997 1.001 0.998 -40 85 maximum transient duration vs. reset threshold overdrive max16016 toc11 reset threshold overdrive (mv) maximum transient duration ( s) 100 50 150 100 50 150 200 250 300 350 400 450 500 0 0 400 350 200 300 250 max16020ptez+ reset occurs above the curve reset timeout period vs. temperature max16016 toc12 temperature ( c) reset timeout period (ms) -15 60 35 10 192 198 200 202 208 210 194 196 204 206 190 -40 85 max16020ptez+ watchdog timeout period vs. temperature max16016 toc13 temperature ( c) watchdog timeout period (s) -15 60 35 10 0.6 0.9 1.0 1.1 1.4 1.5 0.7 0.8 1.2 1.3 0.5 -40 85 pfi threshold vs. temperature max16016 toc14 temperature ( c) pfi threshold (v) -15 60 35 10 0.56 0.59 0.60 0.61 0.64 0.65 0.57 0.58 0.62 0.63 0.55 -40 85 v pfi+ v pfi- normalized ll threshold vs. temperature max16016 toc15 temperature ( c) normalized ll threshold -15 60 35 10 0.996 1.000 1.002 1.003 1.005 0.995 1.004 0.999 0.997 1.001 0.998 -40 85 v cc to out on-resistance vs. temperature max16016 toc07 temperature ( c) v cc to out on-resistance ( ? ) -15 60 35 10 1 2 3 4 5 0 -40 85 v cc = 3.15v, i out = 65ma batt to out on-resistance vs. temperature (v cc = 0v, i out = 20ma) max16016 toc08 temperature ( c) batt to out on-resistance ( ? ) -15 60 35 10 1 2 3 4 5 0 -40 85 v batt = 4.5v v batt = 2.5v v batt = 3v reset output voltage low vs. sink current max16016 toc09 sink current (ma) reset output voltage low (v) 18 16 14 12 10 8 6 4 2 0.1 0.2 0.3 0.4 0.5 0 020 v cc = 3.3v v cc = 5v typical operating characteristics (continued) (v cc = 5v, v batt = 0v, t a = +25?, unless otherwise noted.)
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 8 _______________________________________________________________________________________ battok output voltage low vs. sink current max16016 toc19 sink current (ma) battok output voltage low (v) 18 16 14 12 10 8 6 4 2 0.1 0.2 0.3 0.4 0.5 0 020 v cc = 3.3v v cc = 5v mr falling to reset delay max16016 toc20 200ns/div mr 5v/div reset 5v/div reset propagation delay vs. threshold overdrive max16016 toc21 threshold overdrive (mv) propagation delay ( s) 350 300 250 200 150 100 50 30 40 10 20 50 60 70 0 0400 max16020ptez+ chip-enable gating locking out signal during reset condition max16016 toc22 10 s/div reset 5v/div cein 5v/div ceout 5v/div typical operating characteristics (continued) (v cc = 5v, v batt = 0v, t a = +25?, unless otherwise noted.) wdo output voltage low vs. sink current max16016 toc16 sink current (ma) wdo output voltage low (v) 18 16 14 12 10 8 6 4 2 0.1 0.2 0.3 0.4 0.5 0 020 v cc = 3.3v v cc = 5v v cc supply current vs. wdi frequency max16016 toc17 wdi frequency (khz) i cc ( a) 100 10 20 50 70 10 60 30 40 0 0 1000 batton output voltage low vs. sink current max16016 toc18 sink current (ma) batton output voltage low (v) 18 16 14 12 10 8 6 4 2 0.1 0.2 0.3 0.4 0.5 0 020 v cc = 3.3v v cc = 5v
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating _______________________________________________________________________________________ 9 pin description?ax16016 pin name function 1v cc supply voltage input. bypass v cc to gnd with a 0.1? capacitor. 2 batt backup battery input. if v cc falls below its reset threshold, and if v batt > v cc , out connects to batt. if v cc rises above 1.01 x v batt , out connects to v cc . bypass batt to gnd with a 0.1? capacitor. 3 mr active-low manual reset input. reset asserts when mr is pulled low. reset remains low for the duration of reset timeout period after mr transitions from low to high. connect mr to out or leave unconnected if not used. mr is internally connected to v cc through a 30k ? pullup resistor. 4 pfi power-fail comparator input. connect pfi to a resistive divider to set the desired pfi threshold. the pfi input is referenced to an internal v pft threshold. a v pft-hys internal hysteresis provides noise immunity. the power-fail comparator is powered from out. 5 wdi watchdog timer input. if wdi remains high or low for longer than the watchdog timeout period (t wd ), the internal watchdog timer runs out and a reset pulse is triggered for the reset timeout period. the internal watchdog clears when reset asserts or whenever wdi sees a rising or falling edge. to disable the watchdog feature, leave wdi unconnected or three-state the driver connected to wdi. 6 batton acti ve- h i g h batter y- o n outp ut. batton g oes hi g h w hen i n b atter y- b ackup m od e. 7 pfo active-low power-fail comparator output. pfo goes low when v pfi falls below the internal v pft threshold and goes high when v pfi rises above v pft + v pft-hys hysteresis. 8 gnd ground 9 reset acti ve- low reset outp ut. reset asser ts w hen v c c fal l s b el ow the r eset thr eshol d or m r i s p ul l ed l ow . reset r em ai ns l ow for the d ur ati on of the r eset ti m eout p er i od after v c c r i ses ab ove the r eset thr eshol d and m r g oes hi g h. reset al so asser ts l ow w hen the i nter nal w atchd og ti m er r uns out. 10 out switched output. out is connected to v cc when the reset output is not asserted or when v cc is greater than v batt . out connects to batt when reset is asserted and v batt is greater than v cc . bypass out to gnd with a 0.1? (min) capacitor.
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 10 ______________________________________________________________________________________ pin description?ax16020/max16021 pin max16020 max16021 name function 1 1 batt backup battery input. if v cc falls below its reset threshold, and if v batt > v cc , out connects to batt. if v cc rises above 1.01 x v batt , out connects to v cc . bypass batt to gnd with a 0.1? capacitor. 22 mr active-low manual reset input. reset asserts when mr is pulled low. reset remains low for the duration of reset timeout period after mr transitions from low to high. connect mr to out or leave unconnected if not used. mr is internally connected to v cc through a 30k ? pullup resistor. 3 3 pfi power-fail comparator input. connect pfi to a resistive divider to set the desired pfi threshold. the pfi input is referenced to an internal threshold v pft , v pft-hys internal hysteresis provides noise immunity. the power-fail comparator is powered from out. 4 4 wdi watchdog timer input. if wdi remains high or low for longer than the watchdog timeout period (t wd ), the internal watchdog timer runs out and asserts wdo . the internal watchdog clears when reset asserts or whenever wdi sees a rising or falling edge. to disable the watchdog feature, leave wdi unconnected or three-state the driver connected to wdi. 55 ll active-low low-line output. ll goes low when v cc falls to 2.5% above the reset threshold (table 2). ll provides an early warning of v cc failure before reset asserts. use this output to generate a nonmaskable interrupt (nmi) to initiate an orderly shutdown routine when v cc is falling. 6 batt_test open-drain battery-test output. pulses low for 1.3s every 24 hours during the battery voltage test. if v batt < 2.6v, battok deasserts low. see figure 6 for providing additional load during the battery test. 6 reset active-high reset output. reset asserts when v cc falls below the reset threshold or when mr asserts and stays asserted for the reset timeout period after v cc rises above the reset threshold and mr deasserts. 7 7 battok battery-ok output. battok goes low when the battery voltage falls below the battok threshold (battok is low when in battery-backup mode). 8 8 batton active-high battery-on output. batton goes high when in battery-backup mode.
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ______________________________________________________________________________________ 11 pin description?ax16020/max16021 (continued) pin max16020 max16021 name function 99 wdo active-low watchdog output. wdo asserts when wdi remains high or low longer than the watchdog timeout period. wdo returns high on the next wdi transition or when a reset is asserted. 10 10 pfo active-low power-fail comparator output. pfo goes low when v pfi falls below the internal 0.6v v pft threshold and goes high when v pfi rises above v pft + v pft-hys hysteresis. 11 11 gnd ground 12 12 reset active-low reset output. reset asserts when v cc falls below the reset threshold or mr is pulled low. reset remains low for the duration of the reset timeout period after v cc rises above the reset threshold and mr goes high. 13 13 out switched output. out is connected to v cc when the reset output is not asserted or when v cc is greater than v batt . out connects to batt when reset is asserted and v batt is greater than v cc . bypass out to gnd with a 0.1? (min) capacitor. 14 14 ce out active-low chip-enable output. ce out goes low only when ce in is low and reset is not asserted. if ce in is low when reset is asserted, ce out stays low for 12? (typ) or until ce in goes high, whichever occurs first. 15 15 ce in chip-enable input. the input to ce gating circuitry. connect to gnd or out if not used. 16 16 v cc supply voltage input. bypass v cc to gnd with a 0.1? capacitor. ep exposed pad. internally connected to gnd. connect ep to a large ground plane to aid heat dissipation. do not use ep as the only ground connection for the device.
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 12 ______________________________________________________________________________________ max16016 batt reset battery freshness seal watchdog timer ref out delay v cc out batton mr pfi pfo clear watchdog transition detector wdi reset gnd 100na 25k ? functional diagrams
max16016/max16020/max16021 max16020 max16021 batt reset battery freshness seal watchdog timer battery test circuit disable ce output control ref out delay latch v cc out batton mr pf1 out pfo clear watchdog transition detector reset (reset) (max16021 only) wdi ll wdo gnd cein ceout battok batt_test (max16020 only) 100na 25k ? functional diagrams (continued) low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ______________________________________________________________________________________ 13
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 14 ______________________________________________________________________________________ detailed description the typical application circuit shows a typical connec- tion using the max16020. out powers the static ran- dom-access memory (sram). if v cc is greater than the reset threshold (v th ), or if v cc is lower than v th , but higher than v batt , v cc connects to out. if v cc is lower than v th and v cc is less than v batt , batt connects to out (see the functional diagrams ). in battery-backup mode, an internal mosfet connects the backup battery to out. the on-resistance of the mosfet is a function of backup-battery voltage and temperature. backup-battery switchover in a brownout or power failure, it may be necessary to preserve the contents of the ram. with a backup battery installed at batt, the max16016/max16020/max16021 automatically switch the ram to the backup power when v cc falls. the max16016/max16020/max16021 have a batton output that goes high when in battery-backup mode. these devices require two conditions before switching to battery-backup mode: 1) v cc must be below the reset threshold. 2) v cc must be below v batt . table 3 lists the status of the inputs and outputs in bat- tery-backup mode. the device does not power up if the only voltage source is on batt. out only powers up from v cc at startup. ce signal gating the max16020/max16021 provide internal gating of ce signals to prevent erroneous data from being written to cmos ram in the event of a power failure or brownout. during normal operation, the ce gate is enabled and passes all ce transitions. when the reset output asserts, this path becomes disabled, preventing erroneous data from corrupting the cmos ram. ce out is pulled up to out through an internal current source. the 1.5ns propagation delay from ce in to ce out allows the devices to be used with most ?s and high-speed dsps. during normal operation (reset not asserted), ce in is connected to ce out through a low on-resistance transmission gate. if ce in is high when a reset asserts, ce out remains high regardless of any subsequent transition on ce in during the reset event. if ce in is low when reset asserts, ce out is held low for 12? to allow completion of the read/write operation. after the 12? delay expires, ce out goes high and stays high regardless of any subsequent transitions on ce in during the reset event. when ce out is disconnect- ed from ce in, ce out is actively pulled up to out. the propagation delay through the ce circuitry depends on both the source impedance of the drive to ce in and the capacitive loading at ce out. minimize the capacitive load at ce out to minimize the propaga- tion delay, and use a low output-impedance driver. low-line output ( ll ) the low-line comparator monitors v cc with a threshold voltage typically 2.5% higher than the reset threshold (see table 2). ll asserts prior to a reset condition during a brownout condition. on power-up, ll deasserts after the reset output. ll can be used to provide a nonmask- able interrupt (nmi) to the ? when the voltage begins to fall to initiate an orderly software shutdown routine. manual reset input many ?-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. for the max16016/max16020/ max16021, a logic-low on mr asserts reset/ reset . reset/ reset remains asserted while mr is low. when mr goes high reset/ reset deasserts after a minimum of 145ms (t rp ). mr has an internal 30k ? pullup resistor to v cc . mr can be driven with ttl/cmos logic levels or with open-drain/collector outputs. connect a normally open momentary switch from mr to gnd to create a manual reset function; external debounce circuitry is not required. if mr is driven from a long cable or the device is used in a noisy environment, connect a 0.1? capacitor from mr to gnd to provide additional noise immunity. table 3. input and output status in battery-backup mode pin status v cc disconnected from out out connected to batt batt connected to out. current drawn from the battery is less than 0.55? (at v batt = 3v, excluding i out ) when v cc = 0v. reset/ reset asserted batton, wdo high state (push-pull), high impedance (open-drain) battok, ll low state ce in disconnected from ce out ce out pulled up to v out pfo not affected
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ______________________________________________________________________________________ 15 watchdog timer watchdog input the watchdog monitors ? activity through the input wdi. if the ? becomes inactive, either the reset output is asserted in pulses (max16016) or the watchdog output goes low (max16020/max16021). to use the watchdog function, connect wdi to a bus line or ? i/o line. if wdi remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and reset asserts for the reset timeout period (max16016) or wdo goes low (max16020/max16021). the internal watchdog timer clears whenever the reset output asserts or the wdi sees a rising or falling edge within the watchdog timeout period. the wdi input is designed for a three- stated output device with a 10? maximum leakage cur- rent and the capability of driving a maximum capacitive load of 200pf. the three-state device must be able to source and sink at least 200? when active. disable the watchdog timer by leaving wdi unconnected or by three-stating the driver connected to wdi. the watchdog timer periodically attempts to pulse wdi to the opposite logic-level through a 25k ? resistor for 40? to determine whether wdi is either unconnected or latched to a logic state. the watchdog function is also disabled when in battery-backup mode. watchdog output wdo remains high if there is a transition or pulse at wdi during the watchdog-timeout period. wdo goes low if no transition occurs at wdi during the watchdog timeout period and remains low until the next transition at wdi or when a reset is asserted. connect wdo to mr to gener- ate a system reset on every watchdog fault. when a watchdog fault occurs in this mode, wdo goes low, which pulls mr low, causing a reset pulse to be issued. as soon as the reset output is asserted, the watchdog timer clears and wdo returns high. with wdo connect- ed to mr , a continuous high or low on wdi causes 145ms (min) reset pulses to be issued every 1.235s. battery testing function/battok indicator (max16020/max16021) the max16020/max16021 feature a battery testing function that works in conjunction with the battok out- put. the battery voltage is tested for 1.235s after v cc is applied and once every 24 hours thereafter. during this test, an internal 100k ? resistor is connected from batt to ground and the battery is monitored to ensure that the battery voltage is above 2.6v. if the battery voltage is below 2.6v, the battok output deasserts low to indi- cate a weak battery condition. the max16020 has a batt_test output that pulses high during the battery voltage test. connect a resistor and fet as shown in figure 6 to provide an additional load during the battery test. in battery-backup mode, the battery testing function is disabled and battok goes low. battery freshness seal mode the max16016/max16020/max16021 battery fresh- ness seal disconnects the backup battery from internal circuitry and out until v cc is applied. this ensures the backup battery connected to batt is fresh when the final product is used for the first time. the internal freshness seal latch prevents batt from powering out until v cc has come up for the first time, setting the latch. when v cc subsequently turns off, batt begins to power out. wdi wdo t wd t wd t wd figure 1. watchdog timing (max16016/max16020)
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 16 ______________________________________________________________________________________ to reenable the freshness seal: 1) connect a battery to batt. 2) bring v cc to 0v. 3) drive mr higher than v batt + 1.2v for at least 3?. 4) pull out to 0v. reset output a ?? reset input starts the ? in a known state. the ? supervisory circuits assert a reset to prevent code- execution errors during power-up, power-down, and brownout conditions. reset output is guaranteed to be a logic-low or logic-high depending on the device cho- sen. reset or reset asserts when v cc is below the reset threshold and remains asserted for at least 145ms (t rp ) after v cc rises above the reset threshold. reset or reset also asserts when mr is low. the max16016 watchdog function causes reset to assert in pulses following a watchdog timeout. the reset output is avail- able in both push-pull and open-drain configurations. power-fail comparator the max16016/max16020/max16021 offer an under- voltage comparator that the output pfo goes low when the voltage at pfi falls below its v pft threshold. common uses for the power-fail comparator include monitoring the power supply (such as a battery) before any voltage regulation to provide an early power-fail warning, so software can conduct an orderly system shutdown. the power-fail comparator has a typical input hysteresis of v pft-hys and is powered from out, making it independent of the reset circuit. connect the pfi input to gnd if not used. applications information monitoring an additional supply the max16016/max16020/max16021 ? supervisors can monitor either positive or negative supplies using a resistive voltage-divider to pfi. pfo can be used to generate an interrupt to the ? or to trigger a reset (figures 2 and 3). to monitor a negative supply, con- nect the top of the resistive divider to v cc . connect the bottom of the resistive divider to the negative voltage to be monitored. max16016l max16020l max16021l reset reset pfo mr p gnd additional supply reset voltage r1+r2 r2 v 2(reset) = v pft x (? v cc pfi 0.1 f v 1 r2 r1 v 2 figure 2. monitoring an additional supply by connecting pfo to mr max16016 max16020 max16021 pfo pfo gnd r2 r1 v trip = v pft - (5 - v pft ) v trip is negative v cc pfi 0.1 f r2 r1 5v v- 0 +5v v trip v- 0v figure 3. monitoring a negative supply
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ______________________________________________________________________________________ 17 max16020l ce cein gnd cmos ram v cc batton mr batt 0.1 f 1 f ceout out reset v cc address decode p a0?15 reset figure 5. batton driving an external pass transistor adding hysteresis to pfi the power-fail comparators have a typical input hys- teresis of v pft-hys . this is sufficient for most applica- tions where a power-supply line is being monitored through an external voltage-divider (see the monitoring an additional supply section). figure 4 shows how to add hysteresis to the power-fail comparator. select the ratio of r1 and r2 so that pfi sees v pft when v in falls to the desired trip point (v trip ). resistor r3 adds hys- teresis. r3 is typically an order of magnitude greater than r1 or r2. r3 should be larger than 50k ? to pre- vent it from loading down pfo . capacitor c1 adds additional noise rejection. battery-on indicator (push-pull version) batton goes high when in battery-backup mode. use batton to indicate battery-switchover status or to sup- ply base drive to an external pass transistor for higher current applications (figure 5). operation without a backup power source the max16016/max16020/max16021 provide a bat- tery-backup function. if a backup power source is not used, connect batt to gnd and out to v cc . max16016l max16020l max16021l pfo gnd v cc pfi 0.1 f r2 r1 r3 c1* pfo 0 +5v v l v h v trip v in 0.1 f +5v v in to p r1+r2 r2 v trip = v pft x (? *optional r1 r3 r1 r2 v h = (v pft + v pft-hys ) x ( + + 1 ) v cc - v pft r3 v pft r2 v l = r1 x ( + ) + v pft where v pft is the power-fail threshold voltage figure 4. adding hysteresis to the power-fail comparator
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 18 ______________________________________________________________________________________ replacing the backup battery when v cc is above v th , the backup power source can be removed without danger of triggering a reset pulse. the device does not enter battery-backup mode when v cc stays above the reset threshold voltage. negative-going v cc transients the max16016/max16020/max16021 are relatively immune to short duration, negative going v cc tran- sients. resetting the ? when v cc experiences only small glitches is usually not desirable. a 0.1? bypass capacitor mounted close to v cc provides additional transient immunity. max16020l batt batt_test r load v cc figure 6. adjustable batt_test load
max16016/max16020/max16021 max16021 16 v cc cein ceout out ll reset battok batton 5 15 6 tqfn 14 7 13 8 ep 12 1 11 2 10 3 9 4 batt mr pfi wdi reset gnd pfo wdo max16016 10 out batton v cc wdi 1 8 3 tdfn + + 7 reset batt 9 24 6 5 gnd pfo mr pfi ep top view pin configurations (continued) max16020l ce cein gnd ram v cc pfo batt 0.1 f r1 r2 0.1 f 0.1 f ceout out reset address decode rtc p mr a0?15 rst ll nmi wdi i/o wdo i/o secondary dc voltage 3.3v pfi 0.1 f (min) v cc typical application circuit low-power ? supervisory circuits with battery-backup circuit and chip-enable gating ______________________________________________________________________________________ 19
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating 20 ______________________________________________________________________________________ selector guide part all logic outputs (except batt_test) mr power-fail comparator watchdog timer batton low- line output battok/ batt_test/ reset chip- enable max16016ltb_ push-pull ? wdi max16016ptb_ open-drain ? wdi max16020lte_ push-pull ? wdi/ wdo ? battok/ batt_test max16020pte_ open-drain ? wdi/ wdo ? battok/ batt_test max16021lte_ push-pull ? wdi/ wdo ? battok/ reset max16021pte_ open-drain ? wdi/ wdo ? battok/ reset ordering information (continued) part temp range pin-package max16020 _te_+t -40? to +85? 16 tqfn-ep* max16021 _te_+t -40? to +85? 16 tqfn-ep* the first placeholder ??designates all output options. letter ??indicates push-pull outputs and letter ??indicates open- drain outputs. the last placeholder ??designates the reset threshold (see table 1). t = tape and reel. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. chip information process: bicmos package type package code outline no. land pattern no. 10 tdfn-ep t1033+1 21-0137 90-0093 16 tqfn-ep t1644+4 21-0139 90-0070 package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status.
max16016/max16020/max16021 low-power ? supervisory circuits with battery-backup circuit and chip-enable gating maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 21 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 5/08 initial release 1 7/08 released the max16016. updated ordering information , electrical characteristics , tables 1 and 2, pin description , and detailed description . 1, 3, 4, 5, 9, 10, 12, 13, 15, 16, 19, 20 2 10/08 released the max16021. 20 3 12/08 updated electrical characteristics , pin description , table 3, and the power- fail comparator section. 3, 9, 10, 11, 14, 16 4 1/10 updated electrical characteristics .4 5 4/11 updated pin description . 9, 10

▲Up To Search▲

Price & Availability of MAX1601611

	To Download MAX1601611 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .